MICROCHIP FIL-HSP-IP Core PolarFire Evaluation Kit User Guide
MICROCHIP FIL-HSP-IP Core PolarFire Evaluation Kit Introduction The FPGA-in-the-Loop (FIL)-HSP-IP core is designed to be used for MATLAB® design development and verification on real hardware using the MathWorks FIL simulation methodology on Microchip PolarFire® Evaluation kit (MPF300-EVAL-KIT-TS). Summary The following…
